In this paper, we focus on incorporating a stochastic collocation method (SCM) into a topological shape optimization of a power semiconductor device, including material and geometrical uncertainties. This results in a stochastic direct problem and, in consequence, affects the formulation of an optimization problem. In particular, our aim is to minimize the current density overshoots, since the change of the shape and topology of a device layout is the proven technique for the reduction of a hotspot area. The gradient of a stochastic cost functional is evaluated using the topological asymptotic expansion and the continuous design sensitivity analysis with the SCM. Finally, we show the results of the robust optimization for the power transistor device, which is an example of a relevant problem in nanoelectronics, but which is also widely used in the automotive industry.
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Putek et al. (2015) studied this question.
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