Physical and Electrical Properties of W/WN[sub x]/Poly-Si[sub 1−x]Ge[sub x] (x=0, 0.2, 0.6) Gates Stack with Post-thermal Process

We investigated the physical and electrical properties of a gates stack with a post-thermal process for use in the high performance complementary metal oxide semiconductor field effect transistor. Under the same annealing conditions, the crystallinity of the W films degraded, and the sheet resistance of the films increased with increasing Ge content of the films. These results are attributed to the increase in surface roughness of the films, which suppressed grain growth in the W films as the Ge content of poly increased. After high temperature annealing, the grain size of the W films increased, and the crystallinity of the W films was enhanced due to a reduction of the uniform strain. The elimination of uniform strain in W films and the increase in grain size led to a decrease in the sheet resistance of the structure. In addition, no evidence of the formation of was observed even after annealing at 900°C for 30 min due to the barrier between the W film and the film. However, the N content of the films decreased by about 61% of the initial amount and accumulated below the layer, suggesting an interfacial reaction between the film and the film. As the annealing temperature increased, the amount of dopant in the poly films of the system also decreased due to boron accumulation and the formation of a boron compound (BN).