This paper proposes a circuit topology which reduces the chip size of single-pole–double-throw (SPDT) quarter-wavelength bandpass filter-integrated switches (FIS). A 40-GHz mHEMT MMIC SPDT switch has been implemented and demonstrates a measured insertion loss lower than 1 dB and an isolation better than 30 dB. Another 50-GHz pHEMT MMIC SPDT achieves 1.5 dB insertion loss and 22 dB isolation. The low insertion loss and high isolation shows that the circuit performance is improved along with the reduction of the size. The systematic design approach of the reduced-size FIS is described, together with the analysis of the insertion loss and isolation.
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Lee et al. (2008) studied this question.
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