Variability in device, circuit, and system parameters is one of the primary challenges in the semiconductor industry. Parameter variations degrade processor performance, energy efficiency, and yield across all market segments, ranging from small embedded cores in systems on chip to large multicore servers. In the design, manufacturing, and testing of commercial processors, there are three major variability classifications: 1) simulation tool uncertainties, 2) static parameter variations, and 3) dynamic parameter variations. Simulation tool uncertainties result from a design tradeoff between the simulation time and accuracy for both static-timing analysis and circuit simulators. In addition, transistor and interconnect model inaccuracies increase simulation tool uncertainties, especially when designing a processor in a new technology.
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Keith Bowman (2018) studied this question.
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