Sub-400 °C Si₂H₆Passivation, HfO₂Gate Dielectric, and Single TaN Metal Gate: A Common Gate Stack Technology for In0.7Ga0.3As and Ge1-xSnxCMOS

We report a novel common gate-stack solution for In0.7Ga0.3As n-channel metal-oxide-semiconductor field-effect transistors (nMOSFETs) and Ge0.97Sn0.03p-channel metaloxide-semiconductor field-effect transistors (pMOSFETs), featuring sub-400 °C Si2H6passivation, sub-1.75-nm capacitance equivalent thickness (CET), and single TaN metal gate. By incorporating Si2H6passivation, an ultrathin SiO2/Si interfacial layer is formed between the high-k gate dielectric and the high mobility InGaAs and GeSn channels. The In0.7Ga0.3As nMOSFET and Ge0.97Sn0.03pMOSFET show drive currents of ~143 and ~69μA/μm, respectively, at |VDS| and |VGS- VTH| of 1V for a gate length LGof 4 μm. At an inversion carrier density Ninvof 1013cm-2, In0.7Ga0.3As nMOSFETs and Ge0.97Sn0.03pMOSFETs show electron and hole mobilities of ~495 and ~230cm2/V·s, respectively. At Ninvof 4 × 1012cm-2, electron and hole mobility values of ~705 and ~ 346cm2/V·s are achieved. Symmetric VTHis realized by choosing a metal gate with midgap work function, and CET of less than 1.75nm is demonstrated with a gate-leakage current density (JG) of less than 10-4A/cm2at a gate bias of VTH± 1V. Using this gate-stack, a Ge0.95Sn0.05pMOSFET with the shortest LGof 200nm is also realized. Drive current of ~680μA/μm is achieved at VDSof -1.5V and VGS- VTHof -2V, with peak intrinsic transconductance Gm,intof ~492μS/μm at VDSof -1.1V.