FPGA Approach for Implementation of an Adaline-Based Harmonics Mitigation Technique Using NPLL

This work presents ADALINE Neural Networks based intelligent control design used for harmonics current compensation. Active Power Filters (APF) used for this purpose are also dedicated to reactive power compensation in low voltage power systems. The identification function of an APF control unit is conducted by means of a Neural Direct Identification (NDI) method. For better performance, the neural PLL (NPLL) is combined with the NDI method for the extraction of the reference currents. The current control unit based on Bandless Hysteresis then achieves the re-injection of those currents into the network for harmonics filtering. Models are developed and simulated under MatLab/Simulink® with Altera DSP Builder® (ADB) toolbox, before Field Programmable Gate Array (FPGA) integration. The simulation and the experimental results confirm the interest in realizing and implementing the hardware of the whole APF control unit.