A novel nonvolatile latch with ferroelectric capacitors has been developed to reduce standby power of LSIs. This latch stores the data as a ferroelectric remanent polarization during power off without area penalty and operating speed degradation. Test circuits have been fabricated to confirm characteristics of the latch. The data retention and the stable recall procedure have been confirmed. This paper also describes scaling projection of this technique.
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Fujimori et al. (2002) studied this question.