This paper presents the current sharing and robust voltage regulation controls for paralleled digital signal processor-based soft switching-mode rectifiers (SSMRs). First, the design and implementation of single-module SSMRs are made. In dealing with the current control loop design of each SSMR module, the small-signal model is derived and used to design the current-controlled pulse-width modulation (PWM) scheme. As to the common voltage control loop, its dynamic model is estimated from measurements. Then, a quantitative design procedure is developed to find the parameters of the voltage controller according to the prescribed control specifications. As the changes of parallel number and operating condition occur, the robust control is added to reduce the voltage regulation control performance degradation. The proposed multimodule operation control scheme consists of a master controller and N slave controllers. The former further consists of a common voltage controller and a current distribution unit, and the latter are the current-controlled PWM schemes of all SSMRs. Each slave controller receives the weighted sinusoidal current command from the master controller and regulates the feedback current of SSMR. The results confirm that the designed parallel SSMR system possesses good line drawn current power quality, module current sharing and voltage regulation control performances.
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Li et al. (2004) studied this question.
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