An area- and power-efficient quadrature direct digital frequency synthesis technique called fine-grain angle rotation is presented. To reduce the large bitwidth requirement of the angle rotation, multiple start points are introduced and the angle rotation is applied to the remaining small angle. A prototype chip occupies 0.16 mm2 in 0.25 µm 1P5M CMOS technology and consumes 90 mW at 400 MHz clock frequency, which is a significantly improved performance compared to previous state-of-the-art chips.
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Lee et al. (2003) studied this question.
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