Accelerated Generalized-Probability Bit Architectures for Machine Learning

We introduce the concept of a generalized-probability bit (GP-bit), a hardware primitive designed toencode and exploit non-classical probabilistic structure derived from the framework of convex operationaltheories (COTs). Building on foundational work by Barnum &Wilce on information-processingin convex operational theories and Perinotti’s extension of discord and non-classicality in probabilistictheories, we show how GP-bits may support richer correlation and computation than classical bits,and we propose an architecture inspired by recent all-transistor probabilistic computing hardwarefor diffusion-like models. Our architecture maps convex-theoretic state-spaces to hardware circuits,enabling inference and sampling in GP-bit networks with potential energy and performance gains. Weprovide formal definitions, explore computational primitives, and sketch a system-level hardware architecture.Finally, we propose accelerators for GP-bit architecture platforms and their overwhelminginfluence on machine learning algorithmics.