An organic thin-film transistor memory, based on the pentacene semiconductor/nanoparticle-Al floating-gate/Al2O3 tunneling layer, is demonstrated by a simple fabrication process. The floating-gate transistor exhibits significant hysteresis behaviors in current–voltage characteristics and these hysteresis loops size depends on the gate voltage sweeping range. The memory windows of 32.5, 50, and 67.5 V and the memory ratio of 13, 32, and 70 can be obtained by the writing/erasing pulse of ±40 V, ±50 V, and ±60 V, respectively. The charge storage mechanism is discussed well via holes inject or eject the floated gate by F–N tunneling.
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Wang et al. (2010) studied this question.
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