This paper presents two design methods for threshold element (TE)-based symmetric function generators (SFGs). SFGs enable reconflgurable devices to be more economical by using fewer elements and configuration variables, as compared with lookup tables in conventional field-programmable gate arrays. The first method generates an SFG that consists of (n + 2) TEs and that utilizes (n + 1) configuration variables for any symmetric function of n input variables. The second method successfully reduces the number of TEs because it allows each TE to utilize more configuration variables. This SFG consists of {[29(n + 1)/3] + 1} TEs and utilizes [4(n + l)/3] configuration variables. There is a tradeoff between the number of TEs and configuration variables in these two SFGs. This tradeoff is discussed in relation to circuit performance.
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Kazuo Aoyama (2007) studied this question.