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A highly promising route to scale millions of qubits is to use quantum photonic integrated circuits (PICs), where deterministic photon sources, reconfigurable optical elements, and single-photon detectors are monolithically integrated on the same silicon chip. The isolation of single-photon emitters, such as the G centers and W centers, in the optical telecommunication O-band, has recently been realized in silicon. In all previous cases, however, single-photon emitters were created uncontrollably in random locations, preventing their scalability. Here, we report the controllable fabrication of single G and W centers in silicon wafers using focused ion beams (FIB) with high probability. We also implement a scalable, broad-beam implantation protocol compatible with the complementary-metal-oxide-semiconductor (CMOS) technology to fabricate single telecom emitters at desired positions on the nanoscale. Our findings unlock a clear and easily exploitable pathway for industrial-scale photonic quantum processors with technology nodes below 100 nm.
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Hollenbach et al. (2022) studied this question.
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