A design of a high-density multiple-valued content-addressable memory (MVCAM) is presented. The key concept of the proposed MVCAM is a functionally separated configuration in which the cell functions are split into two basic parts: a threshold function and logic-value conversion. Complicated search operations are synthesised by the combination of these two basic functions. The circuit for logic-value conversion is designed by a binary-to-multiple-valued encoder as a peripheral circuit. Input data are encoded by the logic-value conversion and are distributed to each CAM cell. A CAM cell for performing the threshold function is simply designed using one floating-gate MOS transistor. Separating the complex search operations into the threshold function and the logic-value conversion, a simple CAM cell can be achieved. As a result, it is estimated that a 1 Mbit four-valued CAM can be implemented using conventional flash EEPROM technologies and is useful in two typical applications.
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Hanyu et al. (1995) studied this question.
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