This paper presents the first fully integrated, SONET OC-48 (2.488/2.666 Gb/s) transceiver using a standard CMOS process. Careful design methodology combined with a standard CMOS technology allows performance exceeding SONET requirements with the added benefits of reduced power dissipation, higher integration levels, and simplified manufacturability as compared to other fabrication technologies. This chip, designed using a standard 0.18-/spl mu/m CMOS technology, has a total power dissipation of 500 mW and an rms jitter of 1 ps.
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Momtaz et al. (2001) studied this question.
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