A Unified Arithmetic Representation Based on Eisenstein Norms and CRT Packing

An arithmetic representation is proposed that combines the Chinese Remainder Theorem (CRT) over Eisenstein integers with a floating-point encoding of the Eisenstein norm. Each lane in a 64-bit packed word stores the exponent and mantissa of the norm of an Eisenstein integer. The user chooses the bit allocation between exponent and mantissa at runtime, enabling a continuous trade-off between dynamic range and precision. Multiplication reduces to mantissa multiplication and exponent addition, reducing energy by approximately 30–40× compared to conventional 64-bit multiplication. Accumulation is performed using an exact residue accumulator, preserving the ring isomorphism of the Eisenstein integers. The representation retains the hexagonal lattice geometry, which corresponds to the densest possible packing of circles in two dimensions (π/√12 ≈ 90.69%). The design space is presented as a continuum, allowing users to select the appropriate precision-energy-area trade-off for their workload. Configurations range from exact arithmetic (0% error) to ultra-low-power inference (6.25% error), with dynamic range up to 2^15 for a 4+6 bit split. The architecture is described in full, including the data flow, precision analysis, performance metrics, and implementation considerations. The system achieves 48 operations per cycle, with energy per operation as low as 0.09% of scalar arithmetic. The coarse overflow flag provides deterministic overflow detection, replacing the stochastic Hamming predictor used in previous work. The representation is presented as an evolving design space, allowing for future refinements in precision, energy, and throughput.