Design and Analysis of Si Interconnects for All-Spin Logic

An Si spin interconnect for all-spin logic (ASL) is analyzed by a comprehensive physical model, including spin injection, spin transport, and stochastic magnetization dynamics. It is shown that the spin current density and spin polarization of the current can be improved by changing material properties, interface conditions, and structure dimensions. Furthermore, with the help of an electric field, spin information can preserve and propagate between magnets in a highly doped micrometer-scale Si channel. Different from metallic ASL, instead of the short spin relaxation length, the main constraint of an Si spin interconnect is the high bias voltage required to minimize the energy-delay product (EDP). The minimum EDP and corresponding bias voltage can be reduced significantly by downscaling the nanomagnet. This improvement in the magnetic response allows Si to provide a compatible low-power interconnect technology to metallic ASL.