Modeling and DBC-PSC-PWM Control of a Three-Phase Flying-Capacitor Stacked Multilevel Voltage Source Inverter

In this paper, the authors propose a mathematical model for a new topology called "stacked multicell converter" (SMC). Each phase of the SMC n × m multilevel inverter is formed by a stack of m flying-capacitor multilevel inverters, and each stack or stage is realized by connecting in series n controllable commutation cells. An original multicarrier subharmonic pulsewidth modulation (PWM), called disposition band carrier and phase-shifted carrier PWM (DBC-PSC-PWM), method is developed to produce (n × m + 1) output voltage levels and to improve the output voltage harmonic spectrum with a wide output frequency range. A diagram state machine is then used to decode the DBC-PSC-PWM modulator and distribute the commutations evenly to each inverter cell in a cyclical fashion. To carry out, in practice, the SMC n × m modulation technique, the implementation of the modulation control strategy has been done in a field-programmable gate array circuit XC4010E+ of XILINX to control a three-phase SMC 3 × 2 seven-level inverter, and the experimental results are carried out to confirm the high performance of this inverter.