An efficient algorithm for designing a serial and parallel multioutput logic unit using an associative polarization-encoded optical shadow-casting technique is presented. Devices designed as such have a unique contentaddressable associative memory where each of the memory locations has dual addresses. For illustration, the proposed algorithm has been used to design a serial-output and a parallel-output 2-bit gray adder.
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Awwal et al. (1989) studied this question.
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