We report a novel approach to grow BPD-free 4H-SiC device-ready epilayers, where we start by growing a thin low-doped buffer layer (5 × 10 15 to 1 × 10 16 cm –3, N-type) to achieve 100% BPD conversion, followed by a moderately thick (∼10 μm) higher-doped recombination layer (5 × 10 16 to 1.6 × 10 17 cm –3, N-type) to ensure that all recombination occurs within a BPD-free region. High doping of the BPD-free recombination layer ensures fast carrier recombination under forward bias, preventing any stacking fault nucleation in the active layer during bipolar device operation. All the individual BPDs in the buffer epilayer are converted to benign threading edge dislocations (TEDs) over a wide range of C/Si ratios (1 to 1.8), introducing a minimal on-resistance of <0.5 mΩ-cm 2 . 100% BPD conversion occurs due to the controlled and highly anisotropic eutectic etching of the buffer layer which produces narrow sector angle (5°) for the BPD etch pits to enable conversion of the BPDs within ∼1.5 μm of epilayer growth into TEDs, by promoting lateral growth at the narrow sector of BPD etch pits. This technique enables the translation of BPD conversion technology to real high-power bipolar device architectures in applications such as electric vehicles and solar power grid compatibility circuitry.
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Balachandran et al. (2017) studied this question.
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