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Reduction of leakage power and vulnerability to radiation are of critical challenges in modern nanometer CMOS technologies because of scaling down requirement. Spintronic logic has been progressed to realize these demands based on magnetic-based elements properties especially magnetic tunnel junction (MTJ) such as radiation-hardened, non-volatility, and CMOS process compatibility. A novel soft-error tolerant and highly reliable latch circuit is proposed in this paper which is a promising choice for reliable and low-power architectures. Furthermore, employing the proposed shadow latch based on MTJ cells as a backup structure along with the rad-hard main latch is aimed to the realization of a nonvolatile and SEU-immune flip-flop which is applicable in next-generation CMOS circuits. Simulations of proposed circuits have been performed by SPICE tool and a 45 nm CMOS technology model to evaluate the effectiveness of topologies.
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Amirany et al. (2019) studied this question.
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