Response surface methodology: a modeling tool for integrated circuit designers

An approach to design is described which allows the designer to statistically analyze a circuit's output characteristics. The results of this analysis give the designer the ability to reduce the sensitivity and to optimize these output characteristics with respect to process, package, and environmental variations. In addition, the authors demonstrate the means by which to establish output specifications before time and money are invested in fabricating devices in silicon. Finally, examples of the successful application of this technique to the design and development of an ECL (emitter-coupled logic) family are discussed. The methods for applying the results from this statistical technique to manufacturing and testing are also shown.>