We present a comprehensive experimental study of hot-carrier trap generation and charging effects in high-κ dielectrics using field-effect transistors fabricated with HfO2 and Al2O3 gate insulator stacks and polycrystalline silicon gates. The experiments utilize substrate injection of hot carriers generated either optically or by direct injection in the dark from a forward-biased p–n junction. Comparison of charge-trapping measurements taken using these two techniques on n-channel field-effect transistors (nFETs) and p-channel field-effect transistors (pFETs) finds that enhanced charge trapping occurs when hot holes are present (in the light or in the dark in pFETs but only under illumination in nFETs). A fundamental understanding of the conditions for hot-carrier damage in nFETs is obtained by studying the dependence on light wavelength, temperature, and substrate bias. In particular, the wavelength dependence reveals that the hot-carrier damage depends on a combination of the electron and photon energies. Study of the time dependence of the gate current indicates the buildup of positive charge in the dielectric during stressing. The density of interface traps generated by hot-carrier stressing is estimated using the capacitance–voltage characteristic, and charge transfer experiments to probe the existence of slow states are performed. Finally, the experimental findings are discussed in the context of a speculative picture in which hot holes act as a precursor to damage in the oxide.
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Kumar et al. (2003) studied this question.
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