This paper addresses various timing and glitch detection issues in switch-level simulation. Particular attention is focused on charge sharing. We categorize and analyze problems caused by charge sharing. Solutions to these problems are proposed and applied to real designs. Results are reported and compared with SPICE simulation. The computational complexity of our methods is also investigated.
No takes yet. Share an insight, caveat, or question.
Mark Horowitz (1987) studied this question.
Synapse has enriched one closely related paper. Consider it for comparative context: