The influence of interface roughness scattering (IRS) on the performances of silicon nanowire (NW) field-effect transistors is numerically investigated using a full 3-D quantum transport simulator based on an atomistic sp3d5s* tight-binding model. An interface between silicon and silicon dioxide layers is generated in a real-space atomistic representation using an experimentally derived autocovariance function. An oxide layer is modeled in a virtual crystal approximation using fictitious SiO2atoms. 〈110〉-oriented NWs with different diameters and randomly generated surface configurations are studied. An experimentally observed on-current and threshold voltage are quantitatively captured by the simulation model. The mobility reduction due to IRS is studied through a qualitative comparison of the simulation results with the experimental data.
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Kim et al. (2011) studied this question.
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