Phospho-silicate glass gated 4H-SiC metal-oxide-semiconductor devices: Phosphorus concentration dependence

The correlation between phosphorus concentration in phospho-silicate glass (PSG) gate dielectrics and electrical properties of 4H-SiC MOS devices has been investigated. Varying P uptake in PSG is achieved by changing the POCl3 post-oxidation annealing temperature. The density of interface traps (Dit) at the PSG/4H-SiC interface decreases as the amount of interfacial P increases. Most significantly, the MOSFET channel mobility does not correlate with Dit for all samples, which is highly unusual for SiC MOSFETs. Further analysis reveals two types of field-effect mobility (μfe) behavior, depending on the annealing temperature. Annealing at 1000 °C improves the channel mobility most effectively, with a peak value ∼105 cm2 V−1 s−1, and results in a surface phonon scattering limited mobility at high oxide field. On the other hand, PSG annealed at other temperatures results in a surface roughness scattering limited mobility at similar field.