This study presents an on‐chip spoof surface plasmonic polariton transmission line (sSPP‐TL) in the sub‐THz regime. The proposed sSPP‐TL is designed and fabricated in the standard BiCMOS process. To eliminate the influence of a high index silicon substrate, a special underlying ground shielding plane is introduced. A mode converter is designed with both impedance and momentum matching in order to achieve efficient conversion from grounded coplanar waveguide to sSPP‐TL. Electromagnetic (EM) simulated and measured results show good conversion efficiency from quasi‐transverse EM to sSPP mode (measured input reflection coefficient is below −18.5 dB). More importantly, a low propagation loss profile (average measured insertion loss is 1.54 dB/mm) is observed in the broadband frequency range in sub‐THz (140–325 GHz). The demonstrated sSPP‐TL has shown great potential for on‐chip sub‐THz communication in the standard silicon process.
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Qi et al. (2017) studied this question.
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