Theoretical analysis reveals architectural trade-offs across quantum error correction codes on diverse hardware, highlighting key constraints for fault-tolerant processor design.
Fault-tolerant quantum computing (FTQC) is required to execute quantum algorithms capable of tackling computationally intractable problems in chemistry, material science, and cryptography. Noisy Intermediate-Scale Quantum (NISQ) devices remain constrained by physical error rates that degrade quantum coherence over short circuit depths. Quantum error correction (QEC) protects fragile logical states by encoding them into non-local degrees of freedom across topological physical qubit arrays. This research presents a comprehensive architectural and theoretical evaluation of three primary QEC paradigms: planar surface codes, topological color codes, and asymptotic quantum low-density parity-check (qLDPC) codes. We examine error thresholds, transversal gate constraints governed by the Eastin-Knill theorem, magic state distillation (MSD) overheads, lattice surgery, and classical decoding latencies across superconducting transmons, trapped ions, and neutral atom platforms.
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Pasindu Nanayakkara (2026) studied this question.
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