HYPRES has developed new fabrication processes for higher critical current density Josephson junctions (JJs). These processes incorporate an additional anodization step for junction insulation, which enables fabrication of junctions down to submicron sizes. A set of new processing tools has been employed, including a high density (ICP) plasma etching of niobium and aluminum, and low temperature plasma-enhanced chemical vapor deposition of interlayer dielectric (SiO/sub 2/) from a TEOS source. A set of new parametric control monitor (PCM) test chips has been designed and implemented. Results of electric and SEM characterization of JJ's, wiring, and contact-hole etching are presented. The critical current spreads and shunt resistance uniformity along with the effects of junction shape are discussed. The critical current 1/spl sigma/ spreads of 1.2% have been achieved for the 4.5 kA/cm/sup 2/ process.
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Yohannes et al. (2005) studied this question.
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