Soft Error Susceptibilities of 22 nm Tri-Gate Devices

We report on measured radiation-induced soft error rates (SER) of memory and logic devices built in a 22 nm high-k metal gate bulk Tri-Gate technology. Our results demonstrate excellent single event upset (SEU) scaling benefits of tri-gate devices. For cosmic radiation, SEU SER reduction levels of the order of are observed relative to 32 nm planar devices, while for alpha-particles, the measured SEU SER benefit is in excess of . Similar improvements are observed for Tri-Gate combinational logic and memory array multi-cell upset (MCU) rates. Reduced SER (RSER) device SER performances (relative to standard, non -RSER devices) are on par or better than that of tested 32 nm planar devices. Finally, a novel, efficient SER reduction design called RTS is introduced.