Derives a physics-based circuit model for complex via hole structures in printed circuit boards. The via hole is modeled as a cascade of capacitance and inductance matrices. Capacitance values are computed using a three-dimensional electrostatic solver and inductance values are computed from a two-dimensional quasi-TEM solver. This model is valid at frequencies up to a few gigahertz for typical via hole geometries, where the return current follows a well defined path.
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Laermans et al. (2002) studied this question.
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