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A multiprocessor architecture is presented that is suited for the customized and automated VLSI realization of complex low-to-medium-speed digital signal processing applications. The proposed architecture is constructed from a set of flexible and parameterizable data paths, a selection of powerful control units (for decision-making tasks), and a number of protocols for fast interprocessor communication. The flexible nature of this system allows for an efficient hardware realization utilizing the inherent parallelism of a particular application. The effectiveness of the approach is substantiated with the synthesis of several test vehicles, such as a pitch-extraction algorithm for speech, in terms of the defined architecture.>
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Catthoor et al. (1988) studied this question.
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