FPGA-Based Label Processor for Low Latency and Large Port Count Optical Packet Switches

We present a field-programmable gate array (FPGA)-based label processor for in-band optical labels with a processing time independent of the number of label bits. This allows for implementing an optical packet switching architecture that scales to a large port count without compromising the latency. As a proof of concept, we have employed an FPGA board with 100 MHz clock to validate the operation of the label processor in a 160 Gb/s optical packet switching system. Experimental results show successful three label bits processing and 160 Gb/s packets switching with 1 dB power penalty and 470 ns of latency. Projections on the label processor performance by using more powerful FPGAs indicate that 60 label bits ( optical addresses) can be processed within 31 ns.