Novel H-Bridge-Based Topology of Multilevel Inverter With Reduced Number of Devices

Multilevel inverters (MLIs) have gained significant recognition in the field of high-power conversion due to its reduced voltage stress across the power switches and low total harmonic distortion in the output voltage waveform. However, MLI incorporates a large number of semiconductor switches and isolated dc sources, which increases its cost and complexity and reduces the reliability. In this paper, a novel topology of MLI is proposed for both symmetrical and asymmetrical configurations. The proposed configuration offers a reduced number of controlled switches and dc source as compared to conventional and recently proposed topologies. Reduction in switches and dc sources reduces the cost, size, and complexity and enhances the overall performance of the proposed topology. A comparative analysis of the proposed topologies with the classical topology and recently published topologies have been made in terms of controlled switches, power diodes, driver circuit requirement, dc voltage sources, and blocking voltage. Multicarrier pulsewidth modulation strategy is adopted for generating the switching pulses. The detailed simulation study of the proposed topology has been carried out using MATLAB/SIMULINK and feasibility of topology has been validated experimentally for 5-/25-level inverter.