Open Source Heterogeneous SoCs for Artificial Intelligence: The PULP Platform experience

The exponential growth in AI algorithm complexity creates significant challenges for designing heterogeneous AI SoCs, requiring rapid and cost-effective development cycles. Open-source hardware offers a potential solution by enabling reuse of high-quality, non-differentiating IPs, allowing SoC designers to focus on innovative, differentiating features. Since 2013, the PULP (Parallel Ultra-Low Power) Platform project has been active in designing research IPs and releasing them as opensource. In this article, we focus on the PULP experience designing heterogeneous AI acceleration SoCs, centered on the PULP cluster equipped with a combination of augmented RISC-V processors and cooperative hardware accelerators called HWPEs (Hardware Processing Engines). We detail the evolution of AIdedicated PULP SoCs both in terms of silicon prototypes and of software tools to enable the deployment of end-to-end AI models.