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An analytical model for the partially-depleted (PD) silicon-on-insulator (SOI) MOSFET above threshold was developed. In contrast to previous models, this model includes front-back interface coupling with all the possibilities associated with it (accumulated, neutral, and depleted back interface). The model applies to tied-body as well as floating-body devices; however, thermal and edge effects are neglected. Interface coupling and floating-body effects are integrated together in a new "unified" algorithm. The "pseudo-two-dimensional" approach (which was used successfully to model lateral fields in bulk-Si devices) is extended to SOI devices. The model is extremely physical and thus highly predictive. Good agreement with experiment was obtained over a wide range of channel lengths and back gate voltages. Because of the model's neglect of thermal effects, however, disagreement was observed at high current levels. A brief physical interpretation of the results is also presented.
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Hammad et al. (2001) studied this question.
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