To achieve shorter RC-delay times in integrated circuits low-dielectric-constant (low-k) materials are being investigated for interconnect wiring. Porous silicon dioxide (PS) is one such material. To address scaling issues during fluorocarbon plasma etching of PS, a feature profile model has been integrated with a plasma equipment model. To focus on issues related to the morphology of porous materials, the PS was treated as stoichiometric SiO2. The model was validated by comparison to experiments for PS etching in CHF3 plasmas sustained in an inductively coupled reactor. We found that etch rates (ER) for PS are generally higher than for SiO2 due to the inherent smaller mass density, although ER do not necessarily scale linearly with pore size or porosity. Mass-corrected ER can be either larger or smaller than that of solid SiO2. For example, in polymerizing environments, at high porosities and large pore radii, there is a reduction in ER due to pore filling with polymer. Profile scaling parameters, such as for tapering, observed for solid SiO2, are generally applicable to PS.
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Sankaran et al. (2003) studied this question.
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