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The first prototype of the free-space accelerator for switching terabit networks (FAST-Net) program is described. The optical interconnection module consists of an array of matched high-resolution, wide-angle (f/1.1) imaging lenses that effect a global point-to-point shuffle link pattern across a multichip smart pixel array. A mirror is used to fold the shuffled links back onto the array to facilitate single-plane multichip packaging and simplified opto-mechanical alignment. The test system incorporates several monolithically integrated two-dimensional arrays of vertical-cavity surface-emitting lasers (VCSELs) and photodetectors (PDs) in the multichip plane. In initial experiments the prototype showed good overall optical efficiency and sufficient channel separation for VCSEL/PD arrays with pitches as small as 100 m. These results suggest that high bisection bandwidth optical free-space interconnection fabrics are feasible for high-throughput switching and multiprocessor applications.
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Haney et al. (1999) studied this question.
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