Systematic study of contact annealing: Ambipolar silicon nanowire transistor with improved performance

High performance ambipolar silicon nanowire (SiNW) transistors were fabricated. SiNWs with uniform oxide sheath thicknesses of 6–7nm were synthesized via a gas-flow-controlled thermal evaporation method. Field effect transistors (FETs) were fabricated using as-grown SiNWs. A two step annealing process was used to control contacts between SiNW and metal source and drain in order to enhance device performance. Initially p-channel devices exhibited ambipolar behavior after contact annealing at 400°C. Significant increases in on/off ratio and channel mobility were also achieved by annealing.