Peaked structure appearing in the field effect mobility of silicon MOS devices at temperatures above 20K

Peaked structure is reported in the variation of field effect mobility with gate voltage of high-quality silicon MOS devices close to the switch-on voltage. The positions of the peaks are approximately independent of temperature but the amplitudes grow with increasing temperature in relative order to their proximity to the threshold voltage. These features can be explained on the assumption of a number of discrete trap states located approximately 10 meV below the band edge if the binding energy to the states increases as the gate voltage is raised because of the increasing energy of the size-quantized sub-bands within the inversion layer. The existence of these traps close to the band edge implies that the field effect mobility is not simply related to the true mobility in the threshold region of the device.