Formation of low reverse current ion-implanted n+p junctions by low-temperature annealing

By employing stress compensation technology in conjunction with an ultrahigh vacuum ion implanter, we have obtained two orders of magnitude smaller reverse-bias current levels in n+p junctions annealed at 550 °C as compared to the previous data. When samples are made with an optimum stress compensation condition, the magnitude of reverse-bias currents in n+p junctions as well as the carrier deactivation during post-implantation anneal becomes smallest. In order to further reduce the reverse-bias current level, it is shown that the elimination of contamination involvement during the implantation process is most essential.