Integration of out-of-plane silicon dioxide microtubes, silicon microprobes and on-chip NMOSFETs by selective vapor–liquid–solid growth

Three-dimensional microtubes and microprobes with MOSFET circuits are integrated for use in chemical and electrical neural interface applications with microelectronics. We propose a vapor–liquid–solid (VLS) method to realize both the microtubes and microprobes, which are 2 µm and 3.6 µm in diameter, respectively, and can be fabricated after the on-chip MOSFET processes. The on-chip NMOSFET shows electrical characteristics with a threshold voltage of 1.2 V and a subthreshold swing of 145 mV decade −1 , confirming that subsequent fabrications of the tube and probe are compatible with the inclusion of the on-chip circuits. The prototype oxide tube, which has 2.7 µm inner diameter and 29 µm height, has a flow rate of 550 nl min −1 with an external pump pressure of 33.5 kPa. The impedance of the on-chip Si probe, which has 2 µm diameter and 30 µm height, measured at 1 kHz in a saline environment is 2 MΩ. Insertion into a gelatin membrane confirms that both the tube and the probe show sufficient penetration capabilities.