The effect of gold recombination centers on the trapping state at the silicon/silicon-oxide interface has been studied. The technique involves applying a linear voltage ramp to the device and measuring the resulting I-V characteristic. It is found that at low temperatures (∼230 °K) the technique resolves pronounced structure in the interfacial trap distribution that is not apparent at room temperature. Pronounced peaks in the distribution are reported occurring at EV+0.4 and EV+0.6 eV.
No takes yet. Share an insight, caveat, or question.
Faraone et al. (1978) studied this question.
Synapse has enriched 2 closely related papers on similar clinical questions. Consider them for comparative context: