This study proposes a closed-loop current balancing control scheme for mitigating the current imbalance during switching intervals between IGBTs connected in parallel. The proposed control technique is based on a current balancing control scheme that utilizes a gate driver circuit, in which the output resistance can be varied using a segmented gate driver technique. Moreover, it reduces the current imbalance by minimizing the delay time difference between IGBTs connected in parallel.
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Sasaki et al. (2022) studied this question.
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