Artificial neural networks are massively parallel systems containing large amounts of simple computing elements. Therefore, it is natural to try to implement them using parallel computing architectures. This paper deals with an implementation of a three layer multilayer perceptron artificial neural network. It summarises the impact of using various forms of data representation on the performance of the hardware implementationa Kintex-7 XC7K325T-2FFG900C FPGA chip on a Xilinx Kintex KC705 board.
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