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Metal–insulator–semiconductor devices with composite graphene-encapsulated gates are grown on p- and n-Si substrates. Capacitance–voltage (C–V) measurements indicate a capacitance peak enhancement above the geometrical one in accumulation region. Such enhancement is attributed to negative capacitance contribution of graphene which is due to electron correlation effects. Experimental C–V data are in good agreement with theoretical results.
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Tsipas et al. (2016) studied this question.
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