This paper describes a high-performance and highly reliable GaAs field-effect transistor (FET) with a new gate structure employing the stepped gate recess combined with a multirefractory metal gate. This gate structure allows the simultaneous increase of maximum channel current and gate-drain breakdown voltage (V gdo) of the FET and thus improves significantly its output power (P o) and power-added efficiency (ηadd). The resultant high V gdo with highly stable gate Schottky characteristics and a novel surface stabilization prior to plasma-SiN passivation effectively suppress both catastrophic and gradual failures. The four-chip internally matched device (4×12.6 mm) has delivered P o of 20 W at 1 dB gain compression with 39% ηadd over 3.5 to 4.2 GHz. Sufficient reliability of the 20 W device available for satellite use has been assured by comprehensive reliability tests.
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Sonoda et al. (1992) studied this question.
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