On the Evaluation of Gate Dielectrics for 4H-SiC Based Power MOSFETs

This work deals with the assessment of gate dielectric for 4H-SiC MOSFETs using technology based two-dimensional numerical computer simulations. Results are studied for variety of gate dielectric candidates with varying thicknesses using well-known Fowler-Nordheim tunneling model. Compared to conventional SiO 2 as a gate dielectric for 4H-SiC MOSFETs, high- k gate dielectric such as HfO 2 reduces significantly the amount of electric field in the gate dielectric with equal gate dielectric thickness and hence the overall gate current density. High- k gate dielectric further reduces the shift in the threshold voltage with varying dielectric thicknesses, thus leading to better process margin and stable device operating behavior. For fixed dielectric thickness, a total shift in the threshold voltage of about 2.5 V has been observed with increasing dielectric constant from SiO 2 ( k = 3.9 ) to HfO 2 ( k = 25 ). This further results in higher transconductance of the device with the increase of the dielectric constant from SiO 2 to HfO 2 . Furthermore, 4H-SiC MOSFETs are found to be more sensitive to the shift in the threshold voltage with conventional SiO 2 as gate dielectric than high- k dielectric with the presence of interface state charge density that is typically observed at the interface of dielectric and 4H-SiC MOS surface.