MOS (Si‐Gate) Compatibility of RF Diode and Triode Sputtering Processes

Using a Si‐gate CMOS tester the MOS compatibility has been demonstrated of a metallization process involving triode sputter etch cleaning of Si prior to PtSi contact formation, triode sputter deposition of Ti / TiN / Pt layers, and rf diode sputter etching of the Pt using Ni as a sputter etch mask. The radiation damage induced in the gate regions of CMOS capacitors by each step of this metallization process has been evaluated, and the surface states and oxide charge resulting from the damage have been shown to be completely annealable using hydrogen. Triode sputter etch cleaning of the Si prior to PtSi formation was found to introduce considerable radiation damage. All of this damage could be removed after sintering and stripping the unreacted Pt by a hydrogen anneal at a temperature in the range of 375°–400°C and for times in the range of 1 2 to 1 hr. Subsequent triode sputter deposition of Ti / TiN / Pt leads to the generation of only a small peak ( ∼ 1 – 2 × 10 10 cm − 2 eV − 1 ) in the N ss distribution in the lower half of the bandgap. Sputter etching of Au and Pt in an rf‐diode system at rf power levels of 2 W cm −2 (sputter etch rate ∼900 Å/min for Au) also leads to considerable radiation damage. However, for a lower rf power of ∼1.2 Wcm −2 , which is practical if Pt only is sputter etched, little additional damage is observed over and above that induced during triode sputter deposition of Ti / TiN / Pt . Our results indicate that if a hydrogen anneal is performed prior to the final metal deposition ( i.e. , prior to the structure being sealed if a Si 3 N 4 layer is used), then excess hydrogen can be trapped in the SiO 2 and poly‐Si layers. A low temperature inert ambient anneal ( e.g. , 325°C, 1 hr, vacuum) can then be used subsequent to final metal deposition, during which hydrogen is redistributed, neutralizing any surface states at the Si / SiO 2 interface.