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The dynamic turn-off measurement of SiC MOSFETs is highly sensitive to parasitic parameters in the measurement circuit due to their extremely high di/dt and dv/dt. In particular, the parasitic capacitance in the load inductor and the parasitic inductance in the power loop significantly affect the turn-off measurement results. Therefore, this study first reveals the mechanisms by which these two parasitic parameters affect the turn-off measurement results. Then, this study proposes a design method for the load inductor and a measurement method for turn-off currents to achieve accurate turn-off measurements. Specifically, the equivalent model and analytical expression for the equivalent parasitic capacitance in the load inductor are established. Based on this expression, a winding suggestion for the inductor coil is introduced to minimize parasitic capacitance, reducing it below 5 pF. The proposed current measurement method, utilizing an RC snubber, effectively addresses the reduction in the turn-off current falling rate caused by parasitic inductance in the power loop. Experimental verification demonstrates that the turn-off current measured using the RC snubber-based method closely matches the reference waveform.
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Zhang et al. (2025) studied this question.
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